1. Field of the Invention
The present invention relates to embodiments of a damascene method of forming a semiconductor structure and to embodiments of a semiconductor structure with multiple fin-shaped channel regions having different widths.
2. Description of the Related Art
Integrated circuit design decisions are often driven by device scalability and manufacturing efficiency. For example, because size scaling of planar field effect transistors (FETs) resulted in reduced drive current as a function of reduced channel width, non-planar multi-gate field effect transistors (MUGFETs) (e.g., dual-gate FETs and tri-gate FETs) were developed to provide scaled devices with increased drive current and reduced short channel effects. A dual-gate FET (also referred to as a fin-type FET or FINFET) is a non-planar FET comprising a relatively thin semiconductor fin with a channel region at the center of the fin positioned laterally between source/drain regions at the ends of the fin. A gate structure is adjacent to the opposing sides of the channel region and an isolating cap is on the top surface of the channel region. Thus, the dual-gate FET exhibits two-dimensional field effects. A tri-gate FET is similar in structure to a dual-gate FET. However, the semiconductor fin of a tri-gate FET is typically wider and the gate structure is adjacent to both the opposing sides and the top surface of the channel region. Thus, the tri-gate FET exhibits three-dimensional field effects.
During MUGFET processing, device performance can be tuned by adjusting the width of the semiconductor fin in the source/drain regions and/or channel region and also by incorporating multiple semiconductor fins into a single MUGFET. Unfortunately, tuning device performance in this manner is limited by current MUGFET processing techniques. For example, if one or more relatively thin semiconductor fins are formed for a dual-gate or tri-gate FET and then one or more dopant implantation processes (e.g., source/drain extension implantation, halo implantation, source/drain implantation, etc.) are performed, fin damage can occur. The risk of damage increases significantly as the fin width within the channel region decreases. Therefore, there is a need in the art for an improved method of forming MUGFETs.